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SIO1049 Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
PRODUCT FEATURES
3.3 Volt Operation (5V Tolerant) Programmable Wakeup Event Interface (IO_PME# Pin) SMI Support (IO_SMI# Pin) GPIOs (14) Two IRQ Input Pins XNOR Chain PC99a, PC2001 ACPI 2.0 Compliant 64-pin STQFP Package Intelligent Auto Power Management Serial Ports
-- One Full Function Serial Port -- High Speed 16C550A Compatible UART with Send/Receive 16-Byte FIFO -- Supports 230k and 460k Baud -- Programmable Baud Rate Generator -- Modem Control Circuitry
Data Brief Multi-Mode Parallel Port with ChiProtectTM
-- Standard Mode IBM PC/XT(R), PC/AT(R), and PS/2TM Compatible Bidirectional Parallel Port -- Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) -- IEEE 1284 Compliant Enhanced Capabilities Port (ECP) -- ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On -- 192 Base I/O Address, 15 IRQ and 3 DMA Options Multiplexed Command, Address and Data Bus 8-Bit I/O Transfers 8-Bit DMA Transfers 16-Bit Address Qualification Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems -- PCI CLKRUN# Support -- Power Management Event (IO_PME#) Interface Pin -- -- -- -- --
LPC Bus Host Interface
Infrared Communications Controllers
-- Two IR Ports -- Multi-Protocol Serial Communications Controllers -- One IrDA v1.2 (4Mbps), HPSIR, ASKIR, Consumer IR Support -- One Consumer IR Port (CIRCC3) with Support for NEC PPM, Phillips RC5 and Microsoft CIR Protocols, and PME Wake-up Option; New Capability to Capture Carrier Frequency for Learn Mode -- 4-Channel IR Emitter Transmit Capability (BIRCC) -- Multiple Base I/O Address Options, 15 IRQ Options and 3 DMA Options
SMSC SIO1049
PRODUCT PREVIEW
Revision 0.35 (05-17-06)
Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
ORDER NUMBER: SIO1049-JV FOR 64 PIN, STQN (STQFP ROHS COMPLIANT) PACKAGE
80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123
Copyright (c) 2006 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 0.35 (05-17-06)
PRODUCT PREVIEW
2
SMSC SIO1049
Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
General Description
The SMSC SIO1049 is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O Controller. The SIO1049 implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 14 GPIO pins. The SIO1049 incorporates a 16C550A compatible UART and one Multi-Mode parallel port with ChiProtectTM circuitry plus EPP and ECP support. The SIO1049 does not require any external filter components, is easy to use and offers lower system cost and reduced board area. The SIO1049 offers a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI CLKRUN# support, relocatable configuration ports, and three DMA channel options. The on-chip UART is compatible with the 16C550A. There is a dedicated Serial Infrared interface UART, which complies with IrDA v1.2 (Fast IR), HPSIR, and ASKIR formats (used by Sharp and other PDAs), as well as Consumer IR. There is a second IR port, which supports NEC, Phillips RC5 and Microsoft CIR protocols for waking from any Sleep level, as well as other Consumer IR protocols for normal data transfer, and is enhanced to allow measurement of an incoming carrier. In addition a third block (BIRCC: "Blaster" IR Communication Controller) is provided in order to be able to transmit control on up to four IR Emitter channels. The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The parallel port ChiProtectTM circuitry prevents damage caused by an attached powered printer when the SIO1049 is not powered. The SIO1049 features Software Configurable Logic (SCL) for ease of use. SCL allows programmable system configuration of key functions such as the parallel port and UART. The SIO1049 supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O Address, DMA Channel, and Hardware IRQ of each device in the SIO1049 may be reprogrammed through the internal configuration registers. There are multiple I/O address location options, a Serialized IRQ interface, and three DMA channels.
SMSC SIO1049
PRODUCT PREVIEW
3
Revision 0.35 (05-17-06)
Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
Block Diagram
PD[0:7], IO_SMI#* IO_PME# MULTI-MODE PARALLEL PORT BUSY, SLCT, PE, nERROR, nACK nSLCTIN, nALF nINIT, nSTROBE
SMI PME WDT
CONTROL, ADDRESS, DATA
GENERAL PURPOSE I/O
GP10, GP11, GP12*, GP13*, GP14*, GP23*, GP4[0:7]
SER_IRQ PCI_CLK LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# PCI_RESET# LPCPD# CLKRUN#
SERIAL IRQ
CONFIGURATION REGISTERS
ACPI BLOCK
IRQIN1*, IRQIN2*
TXD1, nRTS1, nDTR1 LPC BUS INTERFACE 16C550 COMPATIBLE SERIAL PORT 1
nCTS1, RXD1, nDSR1, nDCD1, nRI1 IRTX2, IRMODE*
INFRARED INTERFACE (IrCC 2.0) CLOCK GEN CONSUMER INFRARED INTERFACE (CIRCC3, BIRCC)
*
IRRX2, IRRX3* CIRTX* CIRRX* LEARNIN* ETX(0-3)* ED(0-3)*
V TR Vcc Vss
CLOCKI
CLKI32
* Denotes Multifunction Pins
Figure 1 SIO1049 Block Diagram
Revision 0.35 (05-17-06)
PRODUCT PREVIEW
4
SMSC SIO1049
Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
Pin Configuration
nSTROBE
nERROR
nDSR1
BUSY
nACK
RXD1
SLCT
TXD1
nALF
VCC
VSS
PD7
PD6 51
PD5 50
64
63
62
61
60
59
58
57
56
55
54
53
52
49 48 47 46 45 44 43
PD4
PE
nRTS1 nCTS1 nDTR1 nRI1 nDCD1 IO_PME# VTR VSS CLOCKI LAD0 VCC LAD1 LAD2 LAD3 LFRAME# LDRQ#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PD3 PD2 PD1 VCC PD0 VSS nSLCTIN nINIT GP23/SYSOPT1 IRMODE /IRRX3 IRTX2 IRRX2 GP14/IRQIN2/ED3 GP13/IRQIN1/ED2 GP12/IO_SMI#/ED1 GP11/SYSOPT0
SIO1049 64 PIN STQFP
42 41 40 39 38 37 36 35 34 33
SER_IRQ
LPCPD#
VSS
GP40/CIRRX
PCI_RESET#
GP41/CIRTX
CLKRUN#
CLKI32/GP42
GP43/LEARNIN
GP44/ETX0
GP45/ETX1
GP46/ETX2
Figure 2 SIO1049 Pin Diagram
SMSC SIO1049
PRODUCT PREVIEW
5
GP47/ETX3
GP10/ED0
PCI_CLK
VCC
Revision 0.35 (05-17-06)
Super I/O with LPC Interface, with IrDA and Microsoft(R) Windows(R) MCE Consumer IR Support
Package Outline
Figure 3 64 Pin STQFP Package Outline, 7X7X1.4 Body, 2 MM Footprint
Table 1 64 Pin STQFP Package Parameters MIN A A1 A2 D D1 E E1 H L L1 e W ccc ~ 0.05 1.35 8.80 6.80 8.80 6.80 0.09 0.45 ~ 0o 0.13 ~ NOMINAL ~ ~ 1.40 9.00 7.00 9.00 7.00 ~ 0.60 1.00 REF. 0.40 Basic ~ 0.18 ~ MAX 1.60 0.15 1.45 9.20 7.20 9.20 7.20 0.20 0.75 ~ 7o 0.23 0.08 REMARKS Overall Package Height Standoff Body Thickness X Span X body Size Y Span Y body Size Lead Frame Thickness Lead Foot Length Lead Length Lead Pitch Lead Foot Angle Lead Width Coplanarity
Notes: 1. Controlling Unit: millimeter. 2. Tolerance on the true position of the leads is 0.035 mm maximum. 3. Package body dimensions D1 and E1 do not include the mold protrusion. Maximum mold protrusion is 0.25 mm per side. D1 and E1 dimensions determined at datum plane H. 4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. 5. Details of pin 1 identifier are optional but must be located within the zone indicated.
Revision 0.35 (05-17-06)
PRODUCT PREVIEW
6
SMSC SIO1049

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